Using the above truth table and corresponding K-Map, we can now derive the Boolean Expression for XOR Gate. The K-map representation of the above truth table of the XOR Gate is shown below. Low logic that is logic ‘0’, at its output, when When the two inputs are different it produces a logic high value i.e., logic ‘1’ at its output. From this, it is clear that XOR gate produces a logic LOW i.e., Logic ‘0’ at its output, when both the inputs are same (both may be LOW or both may be HIGH). The truth table of XOR gate is shown in the below table. We have to use the Karnaugh Maps or K – Maps along with the truth table to derive the Boolean Expression of XOR gate. As it is a Hybrid gate, the Boolean expression of output of XOR gate is given by a combining of Multiplication, Addition and inverting of inputs. The Boolean expression for XOR gate cannot determined directly like AND, OR gates. The XOR logic symbol in IEEE and IEC standards is shown below. Generally, we follow the IEEE (Institute of Electrical and Electronics Engineers) and IEC (International Electrotechnical Commission) standards. There are multiple standards for defining an electronic component. If both the inputs are LOW or HIGH, then the output is LOW.
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